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Next Nvidia GPU Architecture Revealed - tech|
| (hx) 06:18 PM CEST - Oct,01 2009 | Nvidia revealed the architecture for its
upcoming 'Fermi' GPU at the opening of its GPU Technology Conference in
San Francisco. At this point very little is know about the GPU other
than said architecture; there's no benchmarks, clock speeds or any of
that fun stuff. The Tech Report has posted a three page article
explaining what they do know about the GPU so far:
Fermi incorporates a number of provisions for higher mathematical precision, including support for a fused multiply-add (FMA) operation with both single- and double-precision math. FMA improves precision by avoiding rounding between the multiply and add operations, while storing a much higher precision intermediate result. Fermi is like AMD's Cypress chip in this regard, and both claim compliance with the IEEE 754-2008 standard. Also like Cypress is Fermi's ability to support denorms at full speed, with gradual underflow for accurate representation of numbers approaching zero.
Fermi's native instruction set has been extended in a number of other ways, as well, with hardware support for both OpenCL and DirectCompute. These changes have prompted an update to PTX, the ISA Nvidia has created for CUDA compute apps. PTX is a low-level ISA, but it's not quite machine level; there's still a level of driver translation beneath that. CUDA applications can be compiled to PTX, though, and it's sufficiently close to the metal to require an update in this case.
Nvidia hasn't stopped at taking care of OpenCL and DirectCompute, either. Among the changes in PTX 2.0 is a 40-bit, 1TB unified address space. This single address space encompasses the per-thread, per-SM (or per block), and global memory spaces built into the CUDA programming model, with a single set of load and store instructions. These instructions support 64-bit addressing, offering headroom for the future. These changes, Nvidia contends, should allow C++ pointers to be handled correctly, and PTX 2.0 adds a number of other odds and ends to make C++ support feasible.
There are many things we still don't know about Nvidia's next GPU, including crucial information about its graphics features and likely performance. When we visited Nvidia earlier this month to talk about the GPU-compute aspects of the architecture, the first chips were going through bring-up. Depending on how that process goes, we could see shipping products some time later this year or not until well into next year, as I understand it.
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