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 PSP Chip Details - console
(hx) 03:35 PM CEST - Aug,25 2004
I've noticed over at TheRegister, that Sony has released some details on the chips that will power the PSP. The PSP chipset comprises a number of components: the CPU, a media processor, a 3D graphics engine, a security processor and a power manager.
The PSP's MIPS R4000-based CPU will run at up to 333MHz, Sony chip designer Masanobu Okabe revealed at the Hot Chips conference in Stanford University, California. Its frontside bus runs at up to 166MHz, with both frequencies controlled by processor load. It contains a vector processing engine. Throttling back the core and bus frequency are accompanied by lowering the core voltage from up to 1.2V down to around 0.8V. The chip's power manager can also power down unused functional elements to further conserve battery life. The 6m-transistor chip will be fabbed at 90nm, Okabe said.

The PSP's graphics sub-system will operate across a 512-bit bus and will be capable of rendering 664m pixels per second and 35m polygons per second. The core operates at 166MHz, half the speed of the main CPU, and included 2MB of integrated buffer DRAM. A further 2MB of embedded DRAM is dedicated to the PSP's media processor. The graphics engine supports directional lighting, clipping, environment projection and texture mapping, fogging, alpha blending, depth and stencil tests, vertex blending for morphing-style effects, and dithering, all in 16- or 32-bit colour. It uses

The media engine - or Virtual Mobile Engine, as Sony calls it - has a 24-bit programmable data path to allow it to cope with different audio and video codecs, though it will primarily use the MPEG 4 H.264 codec. Okabe claimed the VME can be reconfigured in a single 166MHz clock cycle.

Sony will also build in a dedicated security engine, which it hopes will eliminate game piracy and attempts to hack the system.

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