AMD has officially unveiled Radeon Vega architecture - tech
(hx) 10:23 PM CET - Jan,06 2017
- Post a comment Vega will feature high bandwidth cache, will be 4X more efficient (my guess it's compared to Fiji's HBM1 as VEGA will take advantage of HBM2), will sport a high bandwidth cache controller, will feature a draw stream binning rasterizer, will support Next Generation Compute and Pixel Engine, will offer 2X bandwidth per pin, will support 128 32-bit, 256 16-bit and 512 8-bit operations per clock, is optimized for higher clock speeds and higher IPC, and will offer 2X peak throughput per clock.
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